Exploring Trade-offs in Performance and Programmability of Processing Element Topologies for Network Processors

Network processors exploit task and packet level parallelism to achieve high throughput. To date, this has resulted in a huge diversity of architectures for similar applications. One of the main differences among network processors is the inter-connection topology between processing elements. This topology significantly influences the achievable performance as well as the programmability of the system. Thus it is essential to understand the trade-offs involved in performance as well as programmability for different processing element topologies. Driven by practical implementations, in this paper, we explore trade-offs for topologies based on an analytical framework. The performance results based on our setup and metrics indicate that for applications like IPv4 forwarding, a pooled topology is best suited. The discussion on trade-offs for additional criteria such as programmability and scalability also reveals benefits of pooled topology over other topologies.